The reason Tivo is 'on' all the time

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Howard

Distinguished
Feb 13, 2001
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Archived from groups: alt.video.ptv.tivo (More info?)

Mike Hunt <in2sheep@yahoo.com> wrote in news:116g7cqmf1kfd87
@corp.supernews.com:

> From this, it is now obvious to me you don't know much about TiVo hardware
> and makes me wonder why you were so strong in your previous arguments
> about TiVo power usage without first understanding the product.

Actually, I thought we had already established he was here just to argue, and
lacked a foundation of even the most basic of knowledge.

--
Minister of All Things Digital & Electronic, and Holder of Past Knowledge
stile99@email.com. Cabal# 24601-fnord | Sleep is irrelevant.
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G

Guest

Guest
Archived from groups: alt.video.ptv.tivo (More info?)

w_tom wrote:
> The IBM403gcx is a Power PC chip; not Intel/AMD
> compatible. It is equivalent in power to a 486 or original
> Pentium chip. Its primary market is only as an embedded
> controller. Are you sure that is your main processor, or part
> of a peripheral Tivo function?

Yes, we are sure it is the main processor.

telnet joe-tivo
=[tivo:root]-# cat /proc/cpuinfo
processor : 0
cpu : IBM 403GCX
clock : 54MHz
revision : 20.1
bogomips : 53.86
machine : Teleworld Customer Device
 
G

Guest

Guest
Archived from groups: alt.video.ptv.tivo (More info?)

In article <qbudnToZNrROxfHfRVn-1Q@comcast.com>,
Joe Smith <joe@inwap.com> wrote:

> w_tom wrote:
> > The IBM403gcx is a Power PC chip; not Intel/AMD
> > compatible. It is equivalent in power to a 486 or original
> > Pentium chip. Its primary market is only as an embedded
> > controller. Are you sure that is your main processor, or part
> > of a peripheral Tivo function?
>
> Yes, we are sure it is the main processor.
>
> telnet joe-tivo
> =[tivo:root]-# cat /proc/cpuinfo
> processor : 0
> cpu : IBM 403GCX
> clock : 54MHz
> revision : 20.1
> bogomips : 53.86
> machine : Teleworld Customer Device

My Hughes HDVR2 returns:

system type : TiVo UMA P0 board
processor : 0
cpu model : R5432 V3.0
BogoMIPS : 161.79
unaligned accesses : 1650979
wait instruction : no
microsecond timers : yes
tlb_entries : 48
extra interrupt vector : no
hardware watchpoint : yes
spurious interrupts : 12818
cycle counter frequency : 81003906


which is a MIPS processor
 

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