VHDL - port mapping from within an if statment

jefe323

Distinguished
Feb 14, 2010
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0
18,590
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is it possible to use a port mapping statement from within an if statement?

ex:

if ( OpCode = "0100" ) then
alu_ripple_adder port map(A=>X(0), B=>Y(0), ... );
elsif (OpCode = "0101") then
alu_comparator port map(....);
end if;
 

vindog67

Distinguished
Oct 12, 2011
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18,510
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here is my code. it keep telling me there is syntax error over there

Line 134: Syntax error near "PORT".
Line 139: Syntax error near ";".

Allocate_process : process(clka)
begin
Multi_Coeff1(index)<= Temp;
if (index>= 23 ) then
SigState(0)<= '1';
end if;
end process Allocate_process;


Multi1_process : process
begin
if(sigSTATE(0)='1')then

here>Alloc1:InputX_ROM PORT MAP
(
clka => clka,
addra => counter,
douta => Input
and here> );
end if;
end process Multi1_process;


PLEASE HELP ME

 
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